# I have no understanding of latches and flip flops and im currently stuck?

Read carefully, im not asking you to tell me all the answers, im just asking for sources and sites you can give me to HELP me with these questions:

Design the divide-by-two circuit. Draw the schematic.

2. Derive the waveform for Q0, the output of the

divide-by-two circuit, and D, in relation to the CLK signal; use a rising-edge-triggered flip-flop.

3. Derive the logic to calculate the three Lite_- and the

Emerg signals from Q0 and CLK.

Draw the circuit for the CONTROL Box

4. Finish the derivation and simplification of the equations

for the Left Control Box relating BULB_L1, BULB_L2,

BULB_L3 to the B, L and R switches as well as to the

three Lite_- and the Emerg signals.

4a. One of the loops in the Karnaugh map could be made

larger. Can you find it? Just check the rules for looping

variable entered maps. If you find it, brag about it to your Prof.

4b. Check if you can do gate sharing between the outputs for BULB_L1, BULB_L2, BULB_L3.

Then draw the circuit for the Left Control Box.

5. Derive the equations for the Right Control Box. Explain your derivation in your prelab.

- Write the equations.

- Draw the circuit, or clearly show the changes from the Left Control Box.

If the TA doesn’t think it is clear, it isn’t!

6. Look at the sample test fixture file shown on page 7. You will be given a file like that one.

How many input combinations can be done with three input switches?

Which tests should be added?

• Write down what must be added to the Test Fixture file to include them.

### 1 Answer

- billrussell42Lv 71 month ago
I'm not about to go thru those. Post any specific problems you have.

re divide by 2, see circuit below. I suggest you get datasheets for common latches and study them

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