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A Differential Capacitive Transducer?

Problem No. (1):

A Differential Capacitive Transducer comprises two capacitances if 15 pF each when it is in zero position and changes by ± 0.5 pF per mm. The transducer is excited by a transformer of 1:1+1 turns ration, its primary is supplied by 10 V r.m.s, the output of the transducer is connected to non-inverting amplifier of Rf = 1 MΩ and Ri = 10 kΩ. Find the output for a displacement of 0.2 mm.

Problem No. (2):

A Variable Separation Capacitive Displacement Sensor of a differential type has plate area of 10 cm2 and separation between central plate and outer ones of 1 mm. The transducer is energized from a transformer 1:0.5+0.5 and supplied from 3 volt, 10 kHz supply. The transducer is followed by an op amp with feedback capacitor of 12 pF. For a displacement of 0.1 mm, find the output voltage.

Any help please ...

2 Answers

  • Ecko
    Lv 7
    6 years ago
    Favorite Answer

    The amplifier gain is 101. Its input resistance is very high because of the feedback.

    The capacitance becomes a divider with 15.1pF and 14.9pF in series. The ratio is not frequency dependent within reason. The initial capacitance on each side is 15pF so the resultant is 10V, which is zero in a differential circuit. With capacitance 15.1pF and 14.9pF the divider gives:

    Vout = Vin * (C1 / (C1 + C2)) = 20 * (15.1 / (15.1 + 14.9)) = 10.0666667V so the change is 66.67mV. When amplified by 101 this becomes 6.734V rms at the amplifier output if the frequency is in the range of the overall response of transformer and amplifier. A reasonable choice is 15.9kHz (easy to calculate as 2*pi*f = 100,000). This is for the ideal situation.

    Practical aspects.

    1) There would be stray capacitance like 10pF for the connection to the input of the amplifier.

    2) The amplifier also needs a bias current return resistor, say 10 megohm as a maximum practical value with a JFET op-amp.

    3) The op-amp would need a gain bandwidth product > 2MHz to achieve full gain of 40dB at 20kHz.

    4) The offset of the op-amp due to bias current and voltage offset is increased by the DC gain. This leads to 2 stages with a gain of 10 each being a better solution.

    5) The loading of a 10 megohm resistor at amplifier inputis according to a source impedance from around 30pF at 15.9kHz. Source impedance is approx:

    Xc = 1/ (2pi * 15900 * 30pF) = 333 kohms. Thus the output is reduced by this load resistor to about 96%.

    6) The 10pF of amplifier input capacitance represents ~1Megohm at this frequency, so reduces the signal to about 75%, so a reasonable estimate is that the input signal is:

    66.67mV * 0.75 = 50mV, so output of 5.05V.

    The second question is a similar approach, except that the amplifier now has a capacitive divider for feedback, and the frequency is given.


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  • 6 years ago

    (1) Frequency of excitation is required.If f is such that wC with w as 2.pi.f and C as 30pF is much lesser than 10k, one can expect that the output will be current*1meg where current is 10V*(0.1/15)/wC with w as 2.pi.f and C is 30pF.

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