i think you're speaking approximately CMOS, the place the right transistor is pMOS and the backside is nMOS. ( I even have got here upon that usually 2.5 or 2 is used no longer 3 to 3.5, yet besides the argument is a similar). the assumption at the back of using a ratio of two is so as that the transistors could have equivalent switching (charging and discharging) circumstances, a pMOS is asserted to be the "flow of holes" (that's truthfully the absence of an electron), which demands the breaking of bonds interior the atoms, to create this "hollow". it is sluggish. CMOS is likewise low on skill utilization that's its important earnings over pMOS and nMOS. it is because of the fact basically one transistor keeps to be on at anybody time (different than in switching, yet that gets complicated so shall we forget approximately it :) ).