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潔西卡 asked in 科學工程學 · 2 decades ago

半導體測試

請問哪裡可以找到半導體測試相關資訊??

我想了解半導體測試的這塊領域~最好越詳細越好的!!

希望能者可以幫忙!!

謝謝~~

6 Answers

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  • 2 decades ago
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    在國際電機電子工程師學會的計算機科學社群裡面的測試技術機構學會巨集很多跟這部分相關的資訊,例如P1500和Boundary Scan

    網址 http://tab.computer.org/tttc/

    半導體測試技術裡面有以下主要的研究領域

    1. Test Generation (ATPG)

    因為測試需要一些test pattern來測試電路的功能完整性和規格符合度,所以在做測試前工程師都會找出一些可用的patter。然而人力尋找這個方法對邏輯電路是相當沒有效率而且愚蠢的,因為現下的邏輯電路動不動就百萬個邏輯閘。所以就會有一些演算法來輔助尋找,PODEM和FAN都是非常好的演算法,其中又以FAN的產生pattern速度最快,Fujiwara(發明FAN演算法的人)好像是亞太區測試技術學會的主席。

    2. Design for Testability (DFT) & BIST

    因為機台測試是相當昂貴的消費,所以一些比較大的公司都會加入DFT circuit在電路裡面。這通常稱作為BIST。當然還有很多不同的電路。這個領域的研究都在比較測試能力以及area overhead,其中尤其以area overhead為最重要。國外大廠從很久以前就會在電路裡面加入DFT,國內的廠商似乎最近才開始覺醒,不過還是有一些IC設計的"工作室"不加這種電路,甚至不做測試。這就是為什麼國內的晶片價格通常比較便宜的原因。

    3. Analog Test & Mixed-Mode Test

    因為類比電路測試不是我的專門,所以無法給予回答。

    4. Memory Testing

    從字面上可以看的到,就是把任何的記憶體拿來做測試的技術。舉凡最簡單的SRAM到現在最熱門的Flash Memory,甚至未來的MRAM和PRAM都可以拿來做測試。這種測試的演算法是March Algorithm,他是一種很規律的演算法。

    5. Wafer-level Testing

    測試分兩個階段,一個是wafer-level test,另一個是post-package test。wafer-level test有相當多的研究來減少這部分的消費(test time),因為這部分的金錢消費是比較貴的。

    6. CPU Testing

    這部分是歐美大老的專業,尤其是Intel和AMD。:D

    國際會議上有很多的論文在不同的領域上發表,由於很多,我就只把他全部列在下面,不加說明。

    1. ATPG

    2. DFT

    3. Analog Test & Mixed-Mode Test

    4. Memory Testing

    5. Wafer-level Test

    6. SoC Test

    7. MEMS Test

    8. Software Testing (這是軟體的測試,不是半導體 :D)

    9. CPU Test

    10. Failure Analysis & Fault Modeling

    11. Built-In Self-Test

    12. Fault-Tolerance & Error Correction

    13. Functional Testing

    14. IDDQ Testing

    15. P1500

    16. Boundary Scan

    17. Automatic Test Equipment (ATE) 測試機台也是研究領域之一

    18. Yield Enhancement

    如果你是學生,而且想要專攻這個領域的話,可以就讀研究所來專攻。國內大學有很多教授在這個領域都學有專長,我將他列在下面。

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    Prof. Shih-Chieh Chang

    Dept. Computer Science

    National Tsing Hua University, Hsinchu

    E-mail: scchang@cs.nthu.edu.tw

    Tel: (03)5715131 ext 2964, Fax: (03) 5723694

    Test Technology Interests: DFT, test synthesis, BIST

    Prof. Tsin-Yuan Chang

    Lab for Reliable Computing (LaRC)

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    VLSI Lab

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    Test Technology Interests: fault simulation, test pattern generation, mixed-signal testing,

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    Prof. Mely Chen

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    Prof. Ching-Hwa Cheng

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    Tel: (04)851-1888 x 4173

    Test Technology Intersest: high speed circuit testing, DFT

    Prof. Jin-Hua Hong

    Dept. Electrical Engineering, National University of Kaohsiung, Kaohsiung

    E-mail: jhhong@nuk.edu.tw, jhhong@larc.ee.nthu.edu.tw

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    Test Technology Intersest: DFT, BIST, analog/mixed-signal testing

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    IC Design Technology Center (DTC)

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    Graduate Institute of Electronics Engr./EE Dept., NTU, Taipei

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    Test Technology Interests: analog/mixed-signal testing, high-speed

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    Dept. Electrical & Computer Engineering and Computer Science

    University of Cincinnati, Cincinnati, OH 45221-0030

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    Test Technology Interests: memory testing, signal integrity testing, MEMS testing, high-speed

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    EDA Lab

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    Test Technology Interests: BIST, IDDQ Testing, Boundary Scan

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    VLSI Testing Lab

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    E-mail: cllee@cc.nctu.edu.tw

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    VLSI Test Lab

    Dept. EE, National Cheng-Kung Univ., Tainan

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    Dept. Electrical Eng., National Central University, Chungli

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    Fax: (03) 4255830

    Test Technology Interests: SOC test, embedded memory test

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    Dept. Electrical Eng., National Taiwan University, Taipei

    E-mail: cmli@cc.ee.ntu.edu.tw

    Tel: (02)23635251 ext 314

    Fax: (02)23681679

    Test Technology Interests: Fault Diagnosis, Defect Based Testing

    Prof. Hsing-Chung Liang

    Dept. of Electronics Eng., Chang Gung Univ., Tao-Yuan

    E-mail: hcliang@mail.cgu.edu.tw

    Tel: (03)3283016 ext 5789

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    Test Technology Interests: TPG, DFT, memory repair

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    Lab for Reliable Computing (LaRC)

    Dept. EE, NTHU, 101, Sec. 2, Kuang Fu Rd., Hsinchu

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    Dept. Electronics Eng., Fu-Jen University, Taipei

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    Test Technology Interests: FPGA Testing, BIST, DFT

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    Dept. Electrical Engineering, Tamkang University, Taipei

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    Test Technology Interests: DFT, test synthesis, BIST

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    Dept. EE, Nat'l Chi-Nan University, Puli

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    Test Technology Interests: DFT, BIST, tester

    Prof. Ming-Der Shieh

    Dept. EE, National Cheng-Kung Univ., Tainan

    E-mail: shiehm@mail.ncku.edu.tw

    Tel: (06)2757575 x 62324, Fax: (06)2345482

    Test Technology Interests: DFT and Mixed-signal testing

    Prof. Chauchin Su

    Dept. Electrical & Control Engineering, NCTU, 1001 Ta Hsueh Rd., Hsinchu

    E-mail: ccsu@cn.nctu.edu.tw

    Tel: 03-4227151 Ext 4465, Fax: 03-4255830

    Test Technology Interests: Interconnect Testing, Analog/Digital Testing

    Prof. Jing-Jou Tang

    Dept. Electronics Eng., Southern Taiwan University of Sci. and Tech.

    Yung-Kang, Tainan County

    E-mail: jjtang@ns.eecs.ntc.edu.tw

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    Test Technology Interests: switch-level and current testing

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    Inst. Comp. Sci., National Chung-Hsing University

    250 Kuo-Kuan Rd., Taichung

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    Tel: (04)22840497 x 910, Fax: (04)22853869

    Test Technology Interests: sequential testing, interconnect testing, BIST

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    Dept. Electronics Eng., Cheng Shiu Institute of Technology, Kaohsiung

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    Lab for Reliable Computing (LaRC)

    Dept. EE, NTHU, 101, Sec. 2, Kuang Fu Rd., Hsinchu

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    Test Technology Interests: memory test, system test, on-line test

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    SoC Technology Center, ITRI

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    Tel: (03)5913488, Fax: (03)5912040

    Test Technology Interests: DfT, BIST, mixed-sgnal testing

    Prof. Chingwei Yeh

    VLSI Lab

    Dept. EE, National Chung Cheng University, Chiayi

    E-mail: ieecwy@ccunix.ccu.edu.tw

    Tel: +886-5-2720411 ext. 6196

    Fax: +886-5-2720862

    Test Technology Interests: general

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  • 6 years ago

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  • 1 decade ago

    受益良多..

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  • 1 decade ago

    您真內行...

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  • 1 decade ago

    請問有誰知道memory testing 這方面之師資

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